U-blox Bulks up in LTE

No longer content to be just a major player in GPS/GNSS chips and modules, Switzerland-based u-blox has acquired U.K.-based Cognovo, Ltd., a provider of LTE baseband IP. At MWC'12, Cognovo was the only company demonstrating a real LTE-Advanced baseband chip. The Swiss company's April acquisition of LTE software stack provider 4MWireless now makes sense. Since the MWC'12 demo highlighted Cognovo's LTE modem that employed the 4MWireless (level 2/3) stack, u-blox' initial acquisition of 4MWireless was obviously the first step in a well-thought-out plan. Rather than going head-to-head against the major LTE modem houses that major in cellphones, it appears that u-blox intends to primarily address 4G modems employed for machine-to-machine (M2M) module applications instead.

When I first surveyed the M2M market several years ago, most applications involved sending just a few hundred bytes at a time over the slow GSM control channel, and the cost was low. After all, applications like daily monitoring of oil storage tank levels didn't require high bandwidth. Such monitoring and even asset tracking continue to be a major markets for M2M hardware, but higher-bandwidth applications like wireless video surveillance move M2M into the LTE realm. Note that unlike cellphones, where most of the data is downloaded from central servers to the user, M2M data is mostly captured and uploaded to central servers or to other destinations. Some pundits say that the number of cellphone users will reach total saturation within the next 2-3 years, but M2M connections will continue to grow without bound, no doubt including LTE connections, too.

Verizon Calibrates on Subscription Data Budgets

U.S. LTE/CDMA carrier Verizon says that smartphone users should expect to buy a minimum data bucket of 4 GB if they use LTE video streaming. According to a Verizon spokesman, "If 4G LTE video streaming is a regular part of your smartphone use, you will need more data, likely 4GB, maybe more." ("More" appears to be about 7GB for power users). On Verizon's recommended Share Everything plan a 4GB data bucket will cost the user $110 each month, with $40 for the cellular subscription fee and $70 for the 4GB data allowance. So, LTE brings both great bandwidth and great cost to the user. Isn't progress wonderful!

DSP Rules

I first publicly predicted that Digital Signal Processing would become a pervasive technology 32 years ago. Up to that time, my prior engineering experience was designing analog communications circuitry and DSP was "chalk ware" that I first encountered as an undergraduate engineer at Georgia Tech (there was no PowerPoint then), but I dismissed it as strictly a mathematical exercise. In fact, "DSP is the mathematical manipulation of an information signal to modify or improve it in some way." That's from the first sentence that I injected into Wikipedia's definition of Digital Signal Processing. But, three decades ago DSP was largely confined to IBM and Univac mainframes. Chips came later.

Note that my definition has nothing to do with speed or the platform on which the DSP algorithms are executed. Anyway, when I found that I could design filters with near-vertical walls (rather than the more sedate analog versions), I had an epiphany! I realized that I could do things in the digital world that were not possible in the analog world.

It was in 1980 that NEC Electronics announced the first programmable DSP chip that employed a hardware multiplier. (the µPD7720). No, it was not Texas Instruments. Also note that the "multiply" function is necessary for most DSP algorithm execution. The year earlier, Intel had introduced the 2920 "analog signal processor," aptly named since it had an on-board A/D for analog input and a D/A for analog output. But, the Intel chip had no hardware multiplier and was too slow (with a 600 ns cycle time) to be suitable for even audio applications. However, with it, Intel received the patent for the first single-chip codec. Oh yes, it was designed by Ted Hoff, also designer of the Intel 4004, arguably the first single-chip computer.

It should also be noted that AT&T also fielded its first programmable DSP chip in 1980, but it was for internal use and was not announced to the outside world. And TI began design of its first programmable DSP chip in 1979 and it was formally announced in 1982 (the TMS32010). TI was the first company to allow programming of its processor on a PC and after much missionary work the company eventually passed all its competitors in that "discrete" DSP chip market.

Traditional "DSP chips" now constitute less than 10% of the DSP silicon market, since most chips employing DSP technology are SoCs that employ DSP cores, SIMD extensions, state machines or even simply multiply-accumulate circuitry (FPGAs, count, too). Note that the biggest market for DSP technology is cellular wireless. And virtually every MCU and MPU family has added DSP circuitry allowing them to also address audio, multimedia or communication functions…in addition to traditional CPU applications. Also note that the accompanying chart doesn't list many other DSP applications like those for disk drive controllers, industrial control, military and medical applications.

MIPS Technologies Bulks Up on DSP

As I noted above, virtually all processor families have added DSP capability. For example, ARM's popular Cortex-M4 licensable MCU includes DSP extensions and has proved to be very popular in industrial, motor control and smart grid applications by licensees like Freescale, NXP, STMicroelectronics and Texas Instruments, Not to be left out of that lucrative control market, MIPS Technologies has recently introduced a new line of competing cores with extensive DSP capabilities. The new Aptive™ product family employs what MIPS terms 2nd generation DSP Application Specific Extensions (ASEs). Directly competitive with ARM's Cortex-M (for MCU) family is the microAptive™ product, based on the prior-generation M14K/c cores, with the addition of microMIPS code compression support and the DSP ASE function block. It comes in both cache-less (microcontroller) and cache-inclusive (microprocessor) variants and has a claimed performance of 3.1 CoreMarks/MHz and 1.57 DMIPS/MHz (vs., Cortex-M4's 2.19 CoreMarks/MHz and 1.25 DMIPS/MHz). But, MIPS is about two years behind the Cortex-M4 introduction, so better performance is not the only determinant of market success.

To address higher-performance markets, MIPS also offers the interAptive™ and proAptive™ products, with the latter directly addressing ARM's popular Cortex-A8 and -A9 (and newer -A5 and -A7) families. MIPS emphasizes their cores' multi-threading support, which the ARM competitors lack, and which transforms each physical core into two virtual cores (with up to four physical cores possible in an interAptiv-based SoC). Speeds of 1GHz and higher are forecast for the two higher-performance products. Again, ARM has a hefty head start in the application processor market with its Cortex-A families, but I like the idea of healthy competition in the market, so I wish MIPS well.

Shameless Plug



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