April 17, 2007: Below are some news highlights during the Intel Developer Forum’s first day.
Patrick Gelsinger, “Instilling Energy Into the Enterprise”
Intel Senior Vice President; General Manager, Digital Enterprise Group
Gelsinger updated attendees on all aspects of the enterprise, from small offices to the most powerful high-performance computing areas. He provided a number of new and unique disclosures, more information on the company’s upcoming next-generation 45 nanometer (nm) processor families, “Penryn” and “Nehalem.” These are the next steps in Intel’s “tick-tock” product strategy and cadence to deliver a new process technology with an enhanced microarchitecture or entirely new microarchitecture every year.
Early Penryn Performance – For Penryn-based desktop PCs, expect increases of about 15 percent for imaging-related applications; 25 percent for 3-D rendering; more than 40 percent for gaming; and more than 40 percent faster video encoding with Intel SSE4 optimized video encoders. These indicators were based on pre-production 45nm Hi-k Intel® quad core processor running at 3.33 Gigahertz with a 1333 front side bus and 12MB cache versus an Intel® Core™ 2 Extreme processor QX6800 introduced last week at 2.93 GHz with 1066 FSB and 8MB cache. For high-performance computing (HPC) and workstation systems, expect performance gains up to an estimated 45 percent for bandwidth intensive applications; and a 25 percent increase for servers using Java*. The indicators were derived from pre-production 45nm Hi-k Intel® Xeon® processors with 1600 MHz front side bus for workstation and HPC, and a 1333 MHz front side bus for server versus current quad-core Intel® Xeon® X5355 processors.
Microsoft Longhorn Demo – Microsoft demonstrated Windows* Server codename “Longhorn” and two technologies: Windows Server Core and its new hypervisor-based virtualization solution, Windows Server virtualization, running on the Intel quad-core Xeon processors. This translates to running up to 8 core virtual machines with "hot add" features, increasing data center uptime and efficiency.
“MP” Server Processors on Deck – Intel’s high-end quad and dual multi-processor servers (codenamed “Caneland”) and branded Intel Xeon® processor 7300 series will arrive in the third quarter in 80 and 50 watt versions for blades. The new servers will complete the transition to its Intel® Core™ microarchitecture for Intel Xeon processor-based servers. Just three months after announcing a joint effort Sun Microsystems, a Sun executive demonstrated its Solaris operating system running on an Intel Xeon® 5100 series processor based system using Intel Dynamic Power technology
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vPro Technology Coming in Second Half – In the second half of the year, Intel will introduce “Weybridge,” the next-generation vPro processor technology for business PCs using Intel® 3-Series chipsets (codenamed “Bear Lake”). As announced 2 weeks ago, Intel’s forthcoming Centrino platform, due later this quarter, will also incorporate vPro technology for the first time in laptops.
System on Chip Plans, Enterprise – Gelsinger unveiled “Tolapai” plans, the first in what will be a family of enterprise-class "system-on-chip" (SoC) products that integrate several key system components into a single Intel architecture-based processor. The 2008 Tolapai product is expected to reduce the chip footprint size by up to 45 percent and power consumption by approximately 20 percent compared to a standard four-chip design, while improving throughput performance and processor efficiency. Tolapai will include the new Intel® QuickAssist Integrated Accelerator technology.
Intel® QuickAssist Technology – Intel® QuickAssist Technology is a comprehensive initiative to optimize the use of accelerators in servers. Accelerators increase the performance of a single function, like security encryption or financial computation, while reducing power consumption. This initiative includes support for acceleration using IA-based multi-core processors and third party accelerators working together in Intel-based servers, and developing new integrated accelerators inside the IA-based processor itself. The approach includes a software layer (Accelerator Abstraction Layer) that allows applications to easily manage accelerators and protect software investment.
Nehalem Processor Family – After Intel’s Penryn processors, Intel will begin manufacturing the Nehalem processor family in 2008. Among many other features, the processors will have from 1-8+ cores per product, and include simultaneous multi-threading to show 2-16 threads per chip. Certain future Nehalem processors will also include options such as system interconnects and integrated memory controllers and high-performance integrated graphics engine.
Project Larrabee -- Intel has begun planning products based on a highly parallel, IA-based programmable architecture codenamed “Larrabee.” It will be easily programmable using many existing software tools, and designed to scale to trillions of floating point operations per second (Teraflops) of performance. The Larrabee architecture will include enhancements to accelerate applications such as scientific computing, recognition, mining, synthesis, visualization, financial analytics and health applications.
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Eric Kim, “Winning the Connected Home”
Intel Senior Vice President; General Manager, Digital Home Group
Kim said that technology innovation and broadband Internet growth are having profound effects on digital entertainment, and that Internet video is the next powerful, disruptive opportunity. He shared how Intel is developing PC and CE-based products and technologies to enable new broadcast and broadband-based information and video entertainment experiences that provide consumers with better control, choice, clarity and community (the “4C’s”) within the home, spanning PCs, TVs, set-top-boxes and other networked media players. A unified Intel architecture (IA)-based foundation across PC and CE platforms will help further bridge the PC, Internet and living room TV experiences.
Next Generation Chipsets, Processors, Software and Intel® Viiv™ Processor Technology:
o Performance and Graphics – The Intel® 3 Series chipsets (“Bearlake”) will arrive this quarter, providing consumers with enhanced Intel® Clear Video Technology and hardware support for Microsoft* DX10. Intel 3 Series Chipsets also boost performance with a faster 1333 MHz front side bus and DDR3 support, PCI Express* 2.0 and Intel® Turbo Memory for faster application loading and boot times. Intel Viiv processor technology codenamed “Salt Creek,” will use versions of these chipsets and arrive in the second half of the year.
o Smaller, Sleeker Designs - This quarter, Intel will extend its next-generation mobile technology into smaller, cooler and quieter PC designs. Among other features, “Santa Rosa on Desktop,” will provideintegrated 802.11n wireless support and include Intel® Turbo Memory.
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o New Desktop to Laptop Media Sharing – Available this quarter, Intel® Media Share Software allows consumers to browse, stream or download media files from Intel Viiv processor technology-based PCs onto their Centrino® Duo-based laptops via a wireless home network.
· PC Style Award Winner Announced – Congratulations to $1 Million Intel® Core™ Processor Challenge grand prize winner TriGem Computer Inc. (Korea) and first runner-up Mesiro (Norway).
· SoC For CE – Intel will deliver IA-based system-on-a-chip (SoC) products for a new generation of Internet compatible consumer electronics (CE) devices, such as digital set top boxes, TVs, and networked media players. This SoC approach will help manufacturers accelerate time to market and develop more cost-effective designs that provide strong processing performance, flexibility and headroom. Intel’s first CE-optimized IA-based SoC is scheduled for 2008, pairing a powerful IA core with leading-edge A/V processing, graphics, and more to help deliver greater performance, full Internet compatibility, and a more cohesive software ecosystem across a number of devices.
· Intel SoC Media Processor – Intel introduced a highly integrated SoC product for CE devices: the Intel® CE 2110 Media Processor powered by a 1GHz XScale® processing core and includes powerful audio-visual capabilities. (Note – separate press release exists.)
· “Skulltrail” –Building on last week’s launch of the Intel® Core™ 2 Extreme processor QX6800, a new dual processor-based platform for later this year will arrive, codenamed “Skulltrail.” It will feature two sockets for quad core processors and four PCI express slots for advanced graphics and allow enthusiasts to take advantage of the Intel Core microarchitecture’s headroom and scaling.
· Home Manageability Feature for PCs – Building from technology in the Intel® vPro™ processor technology, Intel plans to offer an optional home manageability feature in future roadmaps that would allow systems to be managed, repaired and updated remotely. Consumers would have an opt-in/out consent feature, as well as the ability to watch and access audit logs of what was performed.
· Standards for Home Networking – Intel plans to include Home Plug technology as an optional feature on 2008 desktop platforms. The company alsoadvocated the need for improved device-to-device connectivity and displayed an Ultra Wide Band mini-card solution. Kim also talked about Intel’s involvement in other key organizations, including the Digital Living Network Alliance.
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Justin R. Rattner, “Power Your Innovations”
Intel Chief Technology Officer and Senior Fellow; Director, Corporate Technology Group
Rattner's opening keynote provided an overview of Intel's corporate vision and strategy. He pointed to the significance of hosting the first IDF of 2007 in Beijing and covered a broad range of topics.
10X Power Reduction Coming – Rattner pointed to specific goals and timelines to drive down power-consumption and manufacturing die-size to get to processors for ultra mobile computer usage. By the end of the decade, Intel aims to achieve a 10x reduction in power-consumption in its processor portfolio.
Ongoing Teraflops Research – As a follow-up to the recently unveiled 80-core Teraflops research chip, Rattner pointed to pending results on a stacked memory solution – and also demonstrated for the first time this single-piece of programmable silicon reaching 2 Teraflops speed.
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