Luminescent Technologies, Inc., the leading provider of Computational Metrology and Inspection solutions for the global semiconductor manufacturing industry, announced today that EIDEC, an industry consortium focused on advancing technologies needed to support Extreme Ultraviolet Lithography (EUVL) production has adopted Luminescent's EUV Defect Printability Simulator (DPS) software for EIDEC's EUV mask development program. DPS is an extremely fast simulator designed to reduce EUV mask development time by quickly and accurately simulating the effects of contamination, absorber, and buried multilayer defects. A multilayer defect simulation that takes weeks using rigorous Finite Domain Time Difference (FDTD) method takes only seconds using DPS with comparable accuracy. In addition, DPS includes an R&D version of Luminescent's Multilayer Defect Compensation (MDC) algorithm, which calculates modifications to the absorber pattern in order to compensate for the impact of defects in the multilayer stack (patent pending) – an innovative approach to EUV mask defect mitigation.
EUV lithography is the leading candidate to replace traditional DUV lithography for semiconductor patterning. However, a number of critical issues need to be resolved before EUV lithography will be viable in a production environment. Mitigating EUV mask defects is a top issue identified by the ITRS roadmap. The industry is currently years away from defect free blanks so, understanding which defects print and designing ways to reduce/eliminate the impact of these defects are critical for the adoption of EUV lithography.
"We are pleased to have been chosen by EIDEC to provide the software solutions that will accelerate the learning curve for understanding and mitigating EUV contamination, absorber, and buried multilayer defects," said Dr. Linyong (Leo) Pang, Sr. Vice President of Luminescent. EIDEC is already benefiting from the use of Luminescent's DPS software.
About Computational Metrology and Inspection
Computational metrology and inspection is a set of mathematical approaches designed to improve the resolution, throughput, and accuracy of defect inspection, review and repair in mask shops and wafer fabs. Using proprietary algorithms, defect images are processed and automatically analyzed in order to identify and provide advanced warning of wafer print errors that would adversely affect the final device functionality. This process eliminates wafer loss due to misclassified defects and can dramatically improve metrology and inspection cycle times in mask shops and wafer fabs.
About Luminescent Technologies, Inc.
Luminescent is a privately-held, venture-backed company headquartered in Palo Alto,California. Luminescent is a pioneer and leader in computational methods for mask and wafer manufacturing. To learn more about Luminescent, please visit the company website at www.luminescent.com.
EUVL Infrastructure Development Center, Inc. (EIDEC), headquartered in Tsukuba Japan, is a joint venture of eleven Japanese companies and co-developers including five leading foreign semiconductor companies. EIDEC's mission is to resolve the key infrastructure issues preventing the adoption of EUV lithography in production.